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general description the max5811 is a single, 10-bit voltage-output digital-to-analog converter (dac) with an i 2 c-compatible 2-wire interface that operates at clock rates up to 400khz. thedevice operates from a single 2.7v to 5.5v supply and draws only 100? at v dd = 3.6v. a low-power power- down mode decreases current consumption to less than1?. the max5811 features three software-selectable power-down output impedances: 100k ? , 1k ? , and high impedance. other features include an internal precisionrail-to-rail output buffer and a power-on reset (por) circuit that powers up the dac in the 100k ? power-down mode.the max5811 features a double-buffered i 2 c-compatible serial interface that allows multiple devices to share a sin- gle bus. all logic inputs are cmos-logic compatible and buffered with schmitt triggers, allowing direct interfacing to optocoupled and transformer-isolated interfaces. the max5811 minimizes digital noise feedthrough by discon- necting the clock (scl) signal from the rest of the device when an address mismatch is detected. the max5811 is specified over the extended temperature range of -40? to +85? and is available in a space-sav- ing 6-pin sot23 package. refer to the max5812 data sheet for the 12-bit version. applications digital gain and offset adjustmentsprogrammable voltage and current sources programmable attenuation vco/varactor diode control low-cost instrumentation battery-operated equipment features ? ultra-low supply current 100a at v dd = 3.6v 130a at v dd = 5.5v ? 300na low-power power-down mode ? single 2.7v to 5.5v supply voltage ? fast 400khz i 2 c-compatible 2-wire serial interface ? schmitt-trigger inputs for direct interfacingto optocouplers ? rail-to-rail output buffer amplifier ? three software-selectable power-down outputimpedances 100k ? , 1k ? , and high impedance ? read-back mode for bus and data checking ? power-on reset to zero ? miniature 6-pin sot23 package max5811 10-bit, low-power, 2-wire interface, serial, v oltage-output dac ________________________________________________________________ maxim integrated products 1 scl sda 12 6 5 v dd add gnd out max5811 sot23 top view 3 4 pin configuration ordering information r s r s r s r s r p r p v dd c sda scl sdasda scl scl v dd v dd v dd outout max5811 max5811 t ypical operating circuit 19-2270; rev 1; 11/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package top mark max5811leut-t -40 c to +85 c 6 sot23-6 aays max5811meut-t -40 c to +85 c 6 sot23-6 aayu max5811neut-t -40 c to +85 c 6 sot23-6 aayw MAX5811PEUT-t -40 c to +85 c 6 sot23-6 aayy functional diagram appears at end of data sheet. rail-to-rail is a registered trademark of nippon motorola, ltd.i 2 c is a trademark of philips corp. downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics(v dd = +2.7v to +5.5v, gnd = 0, r l = 5k ? , c l = 200pf, t a = t min to t max , unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd , scl, sda to gnd ............................................-0.3v to +6v out, add to gnd ........................................-0.3v to v dd + 0.3v maximum current into any pin............................................50ma continuous power dissipation (t a = +70?) 6-pin sot23 (derate 9.1mw above +70?).................727mw operating temperature range ...........................-40? to +85? maximum junction temperature .....................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units static accuracy (note 2) resolution n 10 bits integral nonlinearity inl (note 3) ?.5 4 lsb differential nonlinearity dnl guaranteed monotonic (note 3) 0.5 lsb zero-code error zce code = 000 hex, v dd = 2.7v 6 40 mv zero-code error tempco 2.3 ppm/ c gain error ge code = 3ff hex -0.8 -3 %fs gain-error tempco 0.26 ppm/ c dac output output voltage range no load (note 4) 0 v dd v dc output impedance code = 200 hex 1.2 ? v dd = 5v, v out = full scale (short to gnd) 42.2 short-circuit current v dd = 3v, v out = full scale (short to gnd) 15.1 ma v dd = 5v 8 wake-up time v dd = 3v 8 ? dac output leakage current power-down mode = high impedance,v dd = 5.5v, v out = v dd or gnd ?.1 ? ? digital inputs (scl, sda) input high voltage v ih 0.7 x v dd v input low voltage v il 0.3 x v dd v input hysteresis 0.05 x v dd v input leakage current digital inputs = 0 or v dd 0.1 1 a input capacitance 6p f digital output (sda) output logic low voltage v ol i sink = 3ma 0.4 v three-state leakage current i l digital inputs = 0 or v dd 0.1 1 a three-state output capacitance 6p f downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac _______________________________________________________________________________________ 3 note 1: all devices are 100% production tested at t a = +25? and are guaranteed by design for t a = t min to t max . note 2: static specifications are tested with the output unloaded. note 3: linearity is guaranteed from codes 29 to 995. note 4: offset and gain error limit the fsr. note 5: guaranteed by design. not production tested. electrical characteristics (continued)(v dd = +2.7v to +5.5v, gnd = 0, r l = 5k ? , c l = 200pf, t a = t min to t max , unless otherwise noted. typical values are at v dd = +5v, t a = +25?.) (note 1) parameter symbol conditions min typ max units dynamic performance voltage-output slew rate sr 0.5 v/? voltage-output settling time to 1/2lsb code 100 hex to 300 hex or 300hex to 100 hex (note 5) 41 2 s digital feedthrough code = 000 hex, digital inputs from 0 to v dd 0.2 nv-s digital-to-analog glitch impulse major-carry transition (code = 1ff hex to 200hex and 200 hex to 1ff hex) 12 nv-s power supplies supply voltage range v dd 2.7 5.5 v all digital inputs at 0 or v dd = 3.6v 100 170 supply current withno load all digital inputs at 0 or v dd = 5.5v 130 190 power-down supply current all digital inputs at 0 or v dd = 5.5v 0.3 1 a timing characteristics (figure 1) serial clock frequency f scl 0 400 khz bus-free time between stopand start conditions t buf 1.3 ? start condition hold time t hd , sta 0.6 ? scl pulse width low t low 1.3 ? scl pulse width high t high 0.6 ? repeated start setup time t su , sta 0.6 ? data hold time t hd , dat 0 0.9 ? data setup time t su , dat 100 ns sda and scl receivingrise time t r (note 5) 0 300 ns sda and scl receivingfall time t f (note 5) 0 300 ns sda transmitting fall time t f (note 5) 20 + 0.1c b 250 ns stop condition setup time t su , sto 0.6 ? bus capacitance c b (note 5) 400 pf maximum duration ofsuppressed pulse widths t sp 05 0 n s downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac 4 _______________________________________________________________________________________ -1.00 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 0 256 512 768 1024 integral nonlinearity vs. input code max5811 toc01 input code integral nonlinearity (lsb) 0 0.25 0.750.50 1.00 1.25 integral nonlinearity vs. supply voltage max5811 toc02 supply voltage (v) integral nonlinearity (lsb) 2.7 4.1 3.4 4.8 5.5 0 0.25 0.750.50 1.00 1.25 -40 10 -15 35 60 85 integral nonlinearity vs. temperature max5811 toc03 temperature ( c) integral nonlinearity (lsb) -1.00 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 0 256 512 768 1024 differential nonlinearity vs. input code max5811 toc04 input code differential nonlinearity (lsb) -0.5 -0.4 -0.2-0.3 -0.1 0 differential nonlinearity vs. supply voltage max5811 toc05 supply voltage (v) differential nonlinearity (lsb) 2.7 4.1 3.4 4.8 5.5 -0.5 -0.4 -0.2-0.3 -0.1 0 -40 10 -15 35 60 85 differential nonlinearity vs. temperature max5811 toc06 temperature ( c) differential nonlinearity (lsb) 0 2 64 8 10 zero-code error vs. supply voltage max8511 toc07 supply voltage (v) zero-code error (mv) 2.7 4.1 3.4 4.8 5.5 no load 0 2 64 8 10 -40 10 -15 35 60 85 zero-code error vs. temperature max5811 toc08 temperature ( c) zero-code error (mv) no load 0 -0.4 -1.2-0.8 -1.6 -2.0 gain error vs. supply voltage max5811 toc09 supply voltage (v) gain error (%fsr) 2.7 4.1 3.4 4.8 5.5 no load t ypical operating characteristics (v dd = +5v, r l = 5k ? , t a = +25?.) downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac _______________________________________________________________________________________ 5 0 -0.4 -1.2-0.8 -1.6 -2.0 -40 no load 10 -15 35 60 85 gain error vs. temperature max5811 toc10 temperature ( c) gain error (%fsr) 0 21 43 5 6 01 0 dac output voltage vs. output source current (note 6) max5811 toc11 output source current (ma) dac output voltage (v) 4 26 8 code = 3ff hex 0 0.5 1.51.0 2.0 2.5 04 26 8 1 0 dac output voltage vs. output sink current (note 6) max5811 roc12 output sink current (ma) dac output voltage (v) code = 100 hex 0 4020 8060 100 120 0 512 256 768 1024 supply current vs. input code max5811 toc13 input code supply current ( a) no load 100 9590 85 80 -40 10 -15 35 60 85 supply current vs. temperature max5811 toc14 temperature ( c) supply current ( a) no loadcode = 3ff hex 50 60 8070 90 100 supply current vs. supply voltage max5811 toc15 supply voltage (v) supply current ( a) 2.5 4.5 3.5 5.5 code = 3ff hexno load 0 100 300200 400 500 power-down supply current vs. supply voltage max58111 toc16 supply voltage (v) power-down supply current (na) 2.7 4.1 3.4 4.8 5.5 z out = high impedance no load t a = +25 c t a = -40 c t a = +85 c out 5v0 10mv/div v dd 100 s/div power-up glitch max5811 toc17 exiting shutdown max5811 toc18 500mv/div out 2 s/div c load = 200pf code = 200 hex t ypical operating characteristics (continued) (v dd = +5v, r l = 5k ? , t a = +25?.) downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac 6 _______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = +5v, r l = 5k ? , t a = +25?.) out 5v0 10mv/div v dd 100 s/div major-carry transition (positive) max5811 toc19 major-carry transition (negative) max5811 toc20 5mv/div out 2 s/div c load = 200pf r l = 5k ? code = 200 hex to 1ff hex settling time (positive) max5811 toc21 500mv/div out 2 s/div c load = 200pf code = 100 hex to 300 hex settling time (negative) max5811 toc22 500mv/div out 2 s/div c load = 200pf code = 300 hex to 100 hex digital feedthrough max5811 toc23 c load = 200pf f scl = 12khz code = 000 hex note 6: the ability to drive loads less than 5k ? is not implied. downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac _______________________________________________________________________________________ 7 detailed description the max5811 is a 10-bit, voltage-output dac with ani 2 c/smbus-compatible 2-wire interface. the device consists of a serial interface, power-down circuitry,input and dac registers, a 10-bit resistor string dac, unity-gain output buffer, and output resistor network. the serial interface decodes the address and control bits, routing the data to either the input or dac register. data can be directly written to the dac register imme- diately updating the device output, or can be written to the input register without changing the dac output. both registers retain data as long as the device is pow- ered. dac operation the max5811 uses a segmented resistor string dacarchitecture, which saves power in the overall system and guarantees output monotonicity. the max5811? input coding is straight binary, with the output voltage given by the following equation: where n = 10 (bits), and d = the decimal value of the input code (0 to 1023). output buffer the max5811 analog output is buffered by a precision, unity-gain follower that slews at about 0.5v/?. the buffer output swings rail-to-rail, and is capable of dri- ving 5k ? in parallel with 200pf. the output settles to ?.5lsb within 4s. power-on reset the max5811 features an internal por circuit that ini-tializes the device upon power-up. the dac registers are set to zero scale and the device is powered-down with the output buffer disabled and the output pulled to gnd through the 100k ? termination resistor. following power-up, a wake-up command must be initiatedbefore any conversions are performed. power-down modes the max5811 has three software-controlled low-powerpower-down modes. all three modes disable the output buffer and disconnect the dac resistor string from v dd , reducing supply current draw to 300na. in power-downmode 0, the device output is high impedance. in power-down mode 1, the device output is internally pulled to gnd by a 1k ? termination resistor. in power- down mode 2, the device output is internally pulled tognd by a 100k ? termination resistor. table 1 shows the power-down mode command words.upon wake-up, the dac output is restored to its previ- ous value. data is retained in the input and dac regis- ters during power-down mode. digital interface the max5811 features an i 2 c/smbus-compatible 2- wire interface consisting of a serial data line (sda) and v vd out ref n = () 2 pin description pin name function 1v dd power supply and dac reference input 2 gnd ground 3 sda bidirectional serial data i/o 4 scl serial clock line 5 add address select. a logic high sets the address lsb to 1, a logic low sets the address lsb to 0. 6 out analog output table 1. power-down command bits power-down command bits pd1 pd0 mode/function 00 power-up device. dac output restored to previous value. 01 power-down mode 0. power-down device with output floating. 10 power-down mode 1. power-down device with output terminated with 1k ? to gnd. 11 power-down mode 2. power-down device with output terminated with 100k ? to gnd. downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac 8 _______________________________________________________________________________________ a serial clock line (scl). the max5811 is smbus com-patible within the range of v dd = 2.7v to 3.6v. sda and scl facilitate bidirectional communication between themax5811 and the master at rates up to 400khz. figure 1 shows the 2-wire interface timing diagram. the max5811 is a transmit/receive slave-only device, rely- ing upon a master to generate a clock signal. the mas- ter (typically a microcontroller) initiates data transfer on the bus and generates scl to permit that transfer. a master device communicates to the max5811 by transmitting the proper address followed by command and/or data words. each transmit sequence is framed by a start (s) or repeated start (s r ) condition and a stop (p) condition. each word transmitted over thebus is 8 bits long and is always followed by an acknowledge clock pulse. the max5811 sda and scl drivers are open-drain outputs, requiring a pullup resistor (500 ? or greater) to generate a logic high voltage (see typical operating circuit ). series resistors r s are optional. these series resistors protect the input stages of the max5811 fromhigh-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl clockcycle. the data on sda must remain stable during the high period of the scl clock pulse. changes in sda while scl is high are control signals (see start and stop conditions ). sda and scl idle high when the i 2 c bus is not busy. start and stop conditions when the serial interface is inactive, sda and scl idle high. a master device initiates communication by issu- ing a start condition. a start condition is a high-to- figure 1. 2-wire serial lnterface timing diagram scl sda stop condition start condition repeated start condition start condition t low t su, dat t su, sta t sp t buf t hd, sta t su, sto t r t f t hd, sta t high t hd, dat scl sda ss r p figure 2. start/stop conditions figure 3. early stop condition scl sda stop start scl sda illegal stop start illegal early stop condition legal stop condition downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac _______________________________________________________________________________________ 9 low transition on sda with scl high. a stop conditionis a low-to-high transition on sda while scl is high ( figure 2 ). a start condition from the master signals the beginning of a transmission to the max5811. themaster terminates transmission by issuing a not acknowledge followed by a stop condition ( see acknowledge bit ). the stop condition frees the bus. if a repeated start condition (sr) is generated instead ofa stop condition, the bus remains active. when a stop condition or incorrect address is detected, the max5811 internally disconnects scl from the serial interface until the next start condition, minimizing digi- tal noise and feedthrough. early stop conditions the max5811 recognizes a stop condition at any pointduring transmission except if a stop condition occurs in the same high pulse as a start condition ( figure 3 ). this condition is not a legal i 2 c format; at least one clock pulse must separate any start and stop condi- tions. repeated start conditions a repeated start (s r ) condition may indicate a change of data direction on the bus. such a changeoccurs when a command word is required to initiate a read operation. s r may also be used when the bus master is writing to several i 2 c devices and does not want to relinquish control of the bus. the max5811 ser-ial interface supports continuous write operations with or without an s r condition separating them. continuous read operations require s r conditions because of the change in direction of data flow. acknowledge bit (ack) the acknowledge bit (ack) is the ninth bit attached toany 8-bit data word. ack is always generated by the receiving device. the max5811 generates an ack when receiving an address or data by pulling sda low during the ninth clock period. when transmitting data, the max5811 waits for the receiving device to generate an ack. monitoring ack allows for detection of unsuc- cessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master should reattempt communica- tion at a later time. slave address a bus master initiates communication with a slavedevice by issuing a start condition followed by the 7- bit slave address ( figure 4 ). when idle, the max5811 waits for a start condition followed by its slaveaddress. the serial interface compares each address value bit by bit, allowing the interface to power downimmediately if an incorrect address is detected. the lsb of the address word is the read /write (r /w ) bit. r/ w indicates whether the master is writing to or read- ing from the max5811 (r/ w = 0 selects the write condi- tion, r/ w = 1 selects the read condition). after receiving the proper address, the max5811 issues anack by pulling sda low for one clock cycle. the max5811 has eight different factory/user-pro- grammed addresses ( table 2 ). address bits a6 through a1 are preset, while a0 is controlled by add.connecting add to gnd sets a0 = 0. connecting add to v dd sets a0 = 1. this feature allows up to eight max5811s to share the same bus. write data format in write mode (r/ w = 0), data that follows the address byte controls the max5811 (figure 5 ). bits c3?0 con- figure the max5811 (table 3 ). bits d9?0 are dac data. bits s1 and s0 are sub-bits and are always zero.input and dac registers update on the falling edge of scl during the acknowledge bit. should the write cycle be prematurely aborted, data is not updated and the sa6a 5a4a3a2a1a0r/w figure 4. slave address byte definition table 2. max5811 i 2 c slave addresses part v add device address (a 6 ...a 0 ) max5811l gnd 0010 000 max5811l v dd 0010 001 max5811m gnd 0010 010 max5811m v dd 0010 011 max5811n gnd 0110 100 max5811n v dd 0110 101 max5811p gnd 1010 100 max5811p v dd 1010 101 c3 c2 c1 c0 d9 d8 d7 d6 figure 5. command byte definition downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac 10 ______________________________________________________________________________________ write cycle must be repeated. figure 6 shows two example write data sequences. read data format in read mode (r/ w = 1), the max5811 writes the con- tents of the dac register to the bus. the direction of table 3. command byte definitions serial data input c3 c2 c1 c0 d9/pd1* d8/pd0* d7-d6 function 1100 dac data dac data dac data load dac with new data from the following data byte andupdate dac output simultaneously as soon as data is available from the serial bus. the dac and input registers are updated with the new data. 1101 dac data dac data dac data load input register with data from the following data byte.dac output remains unchanged. 1110 dac data dac data dac data load input register with data from the following data byte.update dac output to the previously stored data. 1111 x x x x update dac output from input register. the deviceignores any new data. 10xx x x x x read data request. data bits are ignored. the contents ofthe dac register are available on the bus. 01x x0 0x x power up the device. 01xx 0 1 x x power-down mode 0. power down device with outputfloating. 01xx 1 0 x x power-down mode 1. power down device with outputterminated with 1k ? to gnd. 01xx 1 1 x x power-down mode 2. power down device with outputterminated with 100k ? to gnd. s msb msb a6 a5 a4 a3 a2 a1 a0 c3 c2 c1 c0 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 s1 s0 p r/w ack ack ack lsb msb lsblsb s msb a6 a5 a4 a3 a2 a1 a0 c3 c2 x x pd1 pd0 x x p r/w ack ack lsb example write data sequence example write to power-down register sequence msb lsb figure 6. example write command sequences * when c3 = 0 and c2 = 1, data bits d9 and d8 write to the power-down registers (pd1 and pd0). x = don? care. downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac ______________________________________________________________________________________ 11 data flow reverses following the address acknowledgeby the max5811. the device transmits the first byte of data, waits for the master to acknowledge, then trans- mits the second byte. figure 7 shows an example read data sequence. i 2 c compatibility the max5811 is compatible with existing i 2 c systems. scl and sda are high-impedance inputs; sda has anopen drain that pulls the data line low during the ninth clock pulse. the typical operating circuit shows a typ- ical i 2 c application. the communication protocol sup- ports the standard i 2 c 8-bit communications. the general call address is ignored. the max5811 addressis compatible with the 7-bit i 2 c addressing protocol only. no 10-bit address formats are supported. digital feedthrough suppression when the max5811 detects an address mismatch, theserial interface disconnects the scl signal from the core circuitry. this minimizes digital feedthrough caused by the scl signal on a static output. the serial interface reconnects the scl signal once a valid start condition is detected. applications information powering the device from an external reference the max5811 uses the v dd as the dac voltage refer- ence. any power-supply noise is directly coupled to thedevice output. the circuit in figure 8 uses a precision voltage reference to power the max5811, isolating thedevice from any power-supply noise. powering the max5811 in such a manner greatly improves overall performance, especially in noisy systems. the max6030 (3v, 75ppm/?) or the max6050 (5v, 75ppm/?) precision voltage references are ideal choices due to the low power requirements of the max5811. digital inputs and interface logic the max5811 2-wire digital interface is i 2 c and smbus compatible. the two digital inputs (scl and sda) loadthe digital input serially into the dac. schmitt-trigger buffered inputs allow slow-transition interfaces such as sa6 a5 a4 a3 a2 a1 a0 c3 c2 x xx xxx sr a6 a5 a4 a3 a2 a1 a0 msb lsb msb lsb lsb msb ack ack ack d5 d4 d3 d2 d1 d0 x x msb lsb ack ack p r/w = 1 xx pd1 pd0 d9 d8 d7 d6 msb lsb data bytes generated by master device data bytes generated by max5811 ack generated by master device r/w = 0 figure 7. read word data sequence v dd in gnd gnd out out max5811 max6030/ max6050 figure 8. powering the max5811 from an external reference downloaded from: http:///
max5811 optocouplers to interface directly to the device. thedigital inputs are compatible with cmos logic levels. power-supply bypassing and ground management careful pc board layout is important for optimal systemperformance. keep analog and digital signals separate to reduce noise injection and digital feedthrough. use a ground plane to ensure that the ground return from gnd to the power-supply ground is short and low impedance. bypass v dd with a 0.1? capacitor to ground as close to the device as possible. chip information transistor count: 7172process: bicmos 10-bit low power 2-wire interface serial, v oltage-output dac 12 ______________________________________________________________________________________ 10-bit dac input register mux and dac register resistor network power-down circuitry serial interface v dd sda add scl gnd out max5811 functional diagram selector guide part address max5811leut 0010 00x max5811meut 0010 01x max5811neut 0110 10x MAX5811PEUT 1010 10x downloaded from: http:///
max5811 10-bit low power 2-wire interface serial, v oltage-output dac maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 13 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. 6lsot.eps package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) downloaded from: http:///

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